Our Services

High-Level Synthesis Training

We offer training services and consulting services for companies interested in exploring the use of High-Level Synthesis in their hardware (ASIC or FPGA) design flows.

Download a course brochure

.

Behavioral IPs

We have a portfolio of different synthesizable behavioral IP (ANSI-C and SystemC ) optimized for HLS. Click here for a full list of our BIPs.

IP Configurator

Behavioral IP optimizer including HLS synthesis options to generate preferred micro-architecture (to be released soon)

IP and Technology Litigation Experts

Patent searches and expert witness for EDA and FPGA cases mainly.

List of Behavioral IPs

Digital Signal Processing


FIR Filter (configurable number of taps)

Interpolation Filter (configurable number of stages

Decimation Filter (configurable number of stages)

FFT (configurable number points)

Cholesky decomposition


Encryption


AES (cipher, decipher, multiple modes and IOs)

kasumi

snow3G

m5dc

sha


Image Processing


ANNs (Auto-encoder, hand-written digits recognition,etc.)

sobel

JPEG encoder, decoder

Viola-Jones face detection

VGA controller


Communications


adpcm

UART

Viterbi decoder


Processors


MIPS (scalar)

MIPS (pipelined)

RISC-V (pipelined)

About Us

Company Background

Dr. Carrion Schaefer has over 20 years of academic and industrial experience in the design of hardware systems, FPGA and ASICs as well as in the development of commercial HLS tools. From 2007 to 2012 he was a member of the NEC teams that developed NEC's HLS tool CyberWorkbench.

Dr. Carrion Schaefer also served multiple years at OSCI's (now Accellera's) SystemC synthesizable subset working group as one of the members drafting the latests draft (version 1.3).

Dr. Carrion Schaefer, holds a Ph.D. from The University of Birmingham, UK and an MBA from McGill University, Canada. He currently serves as associate Professor at The University of Texas at Dallas at the department of Electrical and Computer Engineering (ECE) where he has established the Design and Reconfigurable Computing Laboratory (DARClab).

Our Skills

  • Behavioral Digital Design 90%
  • SystemC 90%
  • High-Level Synthesis Training 100%
  • HLS tool evaluation 95%
B. Carrion Schaefer

Contact Us

Send us a message

Our location

UT Dallas, incubator hub

800 W Campbell Road, Richardson, TX, 75080 info@highX-tech.com